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Monday, November 3, 2008 - 9:00 AM

Lead Free Challenges

V. S. Vasudevan, Intel Corporation, Hillsboro, OR

Government regulations (EU, China, Japan) necessitated the implementation of Lead Free (LF or Pb free) technology for the second level interconnect. The industry is successfully ramping the LF products across multiple market segments. Critical LF challenges include LF materials and surface finish selection, LF assembly process optimization, mechanical margin reduction; marginality associated material process interaction and reliability margin reduction due to extrinsic factors such as micro voids. This course will cover LF material selection, process window selection, LF surface finish compatibility, backward compatibility and reliability test methods. The course will focus on correlation of material properties and micro structure features to solder joint reliability. The mechanical performance of LF solder joints will be correlated to material stiffness and will be compared with compliant Sn/Pb solder. The differences in the transient bend and dynamic performance of LF solder compared to Sn/Pb solder will be discussed from the fundamental material properties. The effect of material properties on solder joint integrity and reliability will be reviewed. Key reliability challenges such as mechanical margin and solder fatigue performance assessment will be reviewed. The course will also cover various LF failure mechanisms and failure analysis techniques. The impact of PCB related defects such as pad crater and micro voids on LF reliability will be reviewed with examples.