ISTFA Home      Exposition      To Register      ASM Homepage
Back to "Failure Analysis Management" Search
  Back to "Tutorial" Search  Back to Main Search

Monday, November 15, 2004 - 3:45 PM

Cost of Debug and Failure Analysis

S. P. Maher, Oklahoma Christian University, Oklahoma City, OK

Cost of Debug and Failure Analysis (FA) for integrated circuits continues to be an increasing challenge for lab managers and senior technologists, especially for highly integrated devices on leading edge state-of-the-art process technologies. The establishment, operation, and management of a Debug and/or FA Lab require proper perspectives and approaches to maximize the positive impact and cost-effectiveness of the Lab to the product life cycle of the business organization. The purpose of this seminar is to present a holistic approach to the true costs of Debug and FA, the various aspects of Debug/FA Lab operations and the business management requirements.