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Session 3: SPM Techniques 1
Location: South Ballroom (Worcester's Centrum Centre)
(Please check final room assignments on-site).
Session Description: The Scanned Probe Microscope with its nanometer positioning accuracy and sharp probe tip is an ideal platform to extend probing beyond current geometries. Circuit Dimensions have dropped well below optical limits of probing for internal node parametric and functional characterization. The 90 and 65nm generations present new challanges in circuit size and gate leakage and operating voltages. SRAM cell size is about 200nm X 600nm for the 65nm node.

Editors:Mr. Ted Hasegawa National Semiconductor, Santa Clara, CA
Felix Beaudoin IBM
Mr. Michael Eskenazi Qualcomm Corporation, San Diego, CA
Mr. Stanley Swieck Analog Devices, Wilmington, MA
James Cargo Agere Systems, Allentown, PA
Mr. Andy Erickson Multiprobe, Inc., Santa Barbara, CA
Dr. Peter Harris Multiprobe, Inc, Santa Barbara, CA
Mr. David Vallett IBM Systems and Technology Group, Essex Jct., VT
Session Chair:Dr. Peter Harris Multiprobe, Inc, Santa Barbara, CA
11:10 AMPLENARY TALK: Electrical Characterization of Sub-30nm Gatelength SOI MOSFETs
11:35 AMCombination of SCM/SSRM Analysis and Nanoprobing Technique for Soft Single Bit Failure Analysis
12:00 PMCurrent Image Atomic Force Microscopy (CI-AFM) Combined with Atomic Force Probing (AFP) for Location and Characterization of Advanced Technology Node
12:25 PMLunch