A. Street
inscopelabs
San Diego, CA
Circuit Edit for FA, FI, and Debug
Session 6: Circuit Edit for FA, FI, and Debug
 

B. Holdford
Texas Instruments
Dallas, TX
Focused Ion Beam (FIB) User Group
 

B. Tracy
Spansion, LCC
Sunnyvale, CA
Metrology and Materials Analysis
Session 21: Metrology and Materials Analysis
 

C. Boye
IBM

Yield Enhancement
Session 19: Yield Enhancement
 

C. Richardson
Abound Solar
Fort Collins, CO
Failure Analysis Process
Session 7: Case Histories 1
Session 11: Case Histories 2
 

D. Burgess
Accelerated Analysis
Half Moon Bay, CA
Discretes, Passives, and MEMS
Session 20: Discretes, Passives, and MEMS
 

E. Keyes
Semiconductor Insights
Ottawa, ON, Canada
Nano Probe User Group
 

F. Beaudoin
IBM

Die Level Fault Isolation
Session 3: Die Level Fault Isolation
 

J. J. Clement
Sandia National Laboratories
Albuquerque, NM
Optical Techniques
Session 17: Optical Techniques 2
Session 8: Optical Techniques 1
 

J. Birdsley
Dell Inc.
ROUND ROCK, TX
System Level Analysis
Session 9: System Level Analysis 1
Session 22: System Level 2/Packaging 2/SPM 2
 

J. Hartsell
Dell Inc.
ROUND ROCK, TX
System Level Analysis
Session 9: System Level Analysis 1
 

K. S. Wills
Independent Consultant
Sugar Land, TX
Chip Access/Delayering User Group
 

M. Kimball
Maxim Integrated Products
Hillsboro, OR
Session 23: Sample Preparation 2
 

M. Versen
University of Applied Sciences Rosenheim
Rosenheim, Germany
Session 24: Test
 

M. Bruce
Independant
TX
Optical Techniques
Session 8: Optical Techniques 1
 

P. Tangyunyong
Sandia National Laboratories
Albuquerque, NM
Session 18: Nanotechnology Analysis
 

P. Kaszuba
IBM Microelectronics
Essex Junction, VT
SPM Techniques
Session 14: SPM Techniques 1
 

R. Dias
Intel Corporation
Chandler, AZ
Session 2: Package Level Analysis 1
 

R. Harrison
Texas Instruments
Dallas, TX
Package Level Analysis
Session 2: Package Level Analysis 1
 

R. Ross
Independent
VT
Session 5: Panel Discussion 2: Can Competitors Build Some Common FA Facilities To Improve ROI And Efficiency?
 

R. Herrick
Finisar Corporation
Santa Jose, CA
Optoelectronic Devices
Session 16: Optoelectronic Devices
 

R. Hylton
Maxim Integrated Products
Beaverton, OR
Sample Preparation
Session 15: Sample Preparation 1
 

T. Kolasa
Freescale Semiconductor
Tempe, AZ
Session 12: Poster/Luncheon
 

T. Kane
IBM
Hopewell Junction, NY
Scanning Probe Microscopy (SPM) User Group
 

T. Myers
LSI Logic Corporation
Gresham, OR
Session 13: Failure Analysis Process
 

W. E. Vanderlinde
Laboratory for Physical Sciences
College Park, MD
Session 4: Panel Discussion 1: Strategic Development in FA. What Can We Get From Other Technical Sources?
 

W. K. Lo
DCG Systems
Fremont, CA
Session 10: Advanced Techniques 2
 

Z. Wang
Intel Corporation
Chandler, AZ
Advanced Techniques
Session 1: Advanced Techniques 1