T. T. Li, C. C. Wu, J. H. Chuang, Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, Taiwan; J. C. Lee, Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, Taiwan

Summary: In this case, FA was performed for soft failure single bit. A suspected transistor with gate to source/drain leakage was isolated by a preliminary analysis with C-AFM, which has been widely used for the failure analysis of advanced semiconductor products. And for getting more information to realize the failure behavior and mechanism of the suspected transistor, a powerful tool, Nano-probing was used to measure the electrical behavior of a single device for the further analysis. The Id-Vg behavior of the suspected transistor was significantly different from that of reference transistor. Exchanging the voltage sweep of source and drain, the Id-Vg behavior was similar between suspected and reference transistor. Furthermore, gate leak to S/D of suspected transistor was observed from the current components of Ioff I-V curve. The asymmetry I-V behavior means that the gate leak only happened on one node of S/D. In order to double confirm the Nano-probing result and the hypothesis of gate oxide leakage, the simulation data of a gate-leak-to-S/D transistor was compared with Nano-probing data, the result of Id-Vg behavior was almost the same. A local gate oxide anomaly of this gate-leak-to-S/D transistor was observed from X-section TEM images. And a further approach to reveal the leakage point was implemented. Purposed over stress with appropriate voltage bias was applied between the leaky gate and S/D node to make the leakage point a bit burnout, and then 10%wt KOH was used to etch poly-Si and expose gate oxide for observation on the burnout leakage point.