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Tuesday, November 6, 2007 - 3:55 PM

Failure Localization and Design Debug on Mixed-Mode ICs by using the Dynamic Laser Stimulation Techniques

M. A. Sienkiewicz, CNES (French Space Agency) (& Freescale Semiconductor), Toulouse, France; K. Sanchez, P. Perdu, CNES - French Space Agency, Toulouse, France; A. Firiti, Freescale Semiconductor, Toulouse, France; O. Crepel, Freescale Semiconductor SAS, Toulouse, France

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Summary: Nowadays, the laser stimulation techniques have a wide field of application for failure localization and design debug. The static techniques such as TLS (Thermal Laser Stimulation) and PLS (Photoelectric Laser Stimulation) are commonly implemented in the industrial equipment. In the TLS, the device is heated with a 1300nm infrared laser beam to localize the abnormal resistive issues. In the PLS, a 1064nm wavelength laser, scanning the device, contributes to the electron-hole pairs generation in active areas (silicon) and, as consequence, to the additional photocurrent injection [1], [2], [3]. The results of a severe technology progression are: device miniaturization, increasing number of metal layers as well as interconnections and voltage reduction. Moreover, the evolution of mixed-mode ICs shows that the surface area of the digital blocks increases compared to the area of the analog blocks. In addition, a complex interface circuitry is integrated between analog and digital areas. These key points make more complex failure analysis on the mixed-mode devices presenting a functional failure. Static laser stimulation techniques are limited and are not able to localize this type of failure. Consequently, new techniques and tools are required to localize sensitive or failing regions. Recently, new and various dynamic optical techniques based on laser stimulation have been developed and introduced in failure analysis laboratories of semiconductors industry and research, like: SDL [4] (Soft Defect Localization), LADA [5] (Laser Assisted Device Alteration), DVM [6] (Delay Variation Mapping) etc. Which one do we have to choose to make the analysis efficient with the shortest cycle time? The issues described in this paper are based on the work done in collaboration between Freescale Semiconductor and CNES (French Space Agency). Experimental results presented here were obtained on a complex mixed-mode IC from Freescale. These devices, designed in SmartMOS technology, are particularly complex. It is important to underline the singularity and complexity of Freescale device’s because they include on the same chip digital, analog, RF and power electronic applications, plus several interfaces circuitries between them. So we have to take into account all these aspects for electrical diagnostic and failure analysis, which requires a different approach in term of defect localization and design debug in comparison to pure CMOS technology devices. This paper will treat diverse methodology applied on mixed-mode advanced Freescale ICs to localize sensitive areas and to support design solutions in the industrial context of TtM (Time to Market). This abstract presents one case study of a soft defect, successfully resolved with a help of DTLS (Dynamic Thermal Laser Stimulation) [7].