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| Packaging | ||||
| Location: Meeting Room J3 (San Jose McEnery Convention Center) | ||||
| (Please check final room assignments on-site). | ||||
| Session Description: | ||||
| Session Chairs: | Mr. Kendall Scott Wills Independent Consultant, Sugar Land, TX Dr. Zhiyong Wang Intel Corporation, Chandler, AZ | |||
| 8:15 AM | Enhanced De-Packaging and Chip Access FA Techniques | |||
| 9:15 AM | Chip Scale Package and Its Failure Analysis Challenges | |||
| 10:15 AM | Break | |||
| 10:30 AM | Repackaging | |||
| 11:15 AM | X-Ray & SAM Challenges for IC Package Inspection | |||
| 12:00 PM | Lunch | |||
| 1:00 PM | Time Domain Reflectometry | |||
| 1:45 PM | Magnetic Based Current Imaging for Fault Isolation in Die and Packages | |||