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Wednesday, November 5, 2008 - 3:50 PM

Latent Flash Single Bit and Multiple Bits Systematic Approach to Failure Analysis

H. Y. To, C. Dunn, D. Davis, Texas Instruments Inc., Stafford, TX; D. T. Nguyen, Texas Intruments, Inc., Dallas, TX

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Summary: Flash failure was reported at different point after leaving the fab and at different temparature. To verify the issue, stress test was performed using voltate and temperature stress tests. The failure circuitry was determined from electrical failure analysis and test, which identified the failure in the MUX. The physical failure analysis includes voltage contrast on the circuitry involved, nanoprobing of the transistor in question, and TEM crossection at the defect location. TEM showed Cobalt/Carbon siliside residue on the sidewall.