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Tuesday, November 4, 2008 - 4:35 PM

Insulator Deposition for Through Conductor Editing

C. Richardson, Abound Solar, Fort Collins, CO; T. Malik, V. Makarov, DCG Systems Inc., Fremont, CA

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Summary: The deposition of FIB deposited insulator (I-dep) for circuit edit was investigated about ten years ago [1, 2, 3,4,5,6,] and therefore when there was more space available for an edit. In circuit edit I-dep has several applications: A. Repassivation of an edit site after an edit B. Isolation of 2 newly formed traces C. Sealing a copper cut as copper is prone to corrosion D. Protecting the bottom of a trench when backside editing (also makes an anti-reflective coating, ARC) E. Lining an access hole through a power plane or through Si when backside editing (See Fig. 1). Application E should be considered the most critical of these several applications. Bringing a signal through a conductive material such as the power plane or Si, requires that the access hole be lined with insulator. With the onset of low-k technologies, the increase in backside bulk design repair applications, and increase in SOI applications, the more critical the role insulator deposition will play.