M. Keim, Mentor Graphics, Wilsonville, OR
This tutorial gives an overview of commonly used DFT-kind modifications of logic designs. After a short introduction of the underlying ideas of logic testing, it continues with scan testing and other basic methods. In currently used technologies of 90nm and below, these well-known basic test methods come to their limits: Many different fault modes and increasing quality requirements cause test pattern sets to become unhandably large. Throughout industry, embedded test methods are widely accepted solutions of this problem. The tutorial discusses the principle underlying techniques and describes and compares the latest available methods in large detail.