The 35th International Symposium for Testing and Failure Analysis (November 15-19, 2009) of ASM
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Fault Isolation
Location: J1/J4 (San Jose McEnery Convention Center)
(Please check final room assignments on-site).
Session Description: The haystacks are taller, and the needles are smaller. Before any understanding of a root cause can start, the failure analyst must first find the location of the defect on a failing chip. In this session, we focus on both imaging techniques that can pinpoint a defective location on the failing chip.

Session Chair:Dr. James J. Demarest IBM, Albany, NY
8:30 AM Beam-Based Defect Localization
10:15 AM Break
10:30 AM Fundamentals of Laser Based FA Techniques
11:45 AM Lunch
1:00 PM LADA and SDL Techniques
2:00 PM Magnetic Based Current Imaging for Fault Isolation in Die and Packages
3:00 PM Break
3:15 PM Failure Localization with Active and Passive VC in FIB and SEM