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Wednesday, November 17, 2010 - 10:20 AM
9.1

Application of Real Time Lock-in Thermography On PCB for Fault Localization and Validation of Failure Mechanism Due to External Discrete Component Variation

W. Ng, K. Weaver, Z. Gemmill, National Semiconductor, Santa Clara, CA; H. Deslandes, DCG Systems, Fremont, CA; R. Schlangen, TUB Berlin Institute of Technology, Berlin, Germany

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Summary: This paper describes the use of a real time lock-in thermography (LIT) system to characterize thermal events prior to the failing of an IC device. The methodology was applied on an IC installed on PCB with few other discrete components. The purpose was to check the effect of using different values of a specific on-board discrete inductor that would result in any thermal signature of the IC prior to the failure. As EOS typically closely associates with thermal events, observing thermal distribution from operating IC would provide insight into the cause of failure.