Chip Scale Package (CSP) is ideal for the applications of Cellular and Portable devices that require better use of real estate on the PC boards. It has advantages of low package profile, easy routing and superior reliability. However, due to their small form factor, it is difficult to handle this type of package for both package level and die level failure analysis. In this paper, a brief overview of definitions for CSPs and their applications are included. The challenges for performing failure analysis on CSPs, particularly for Multi-Chip Packages (MCP), at package level and die level are discussed. In order to successfully perform device electrical testing and failure diagnostic on CSPs, special requirements have to be addressed on precision decapsulation for FBGA packages, and additional attention has to be paid to top die removal for MCPs. Several case studies are presented at the end of this article to demonstrate the procedures for performing failure analysis on CSP devices