E. I. Cole Jr., Sandia National Laboratories, Albuquerque, NM; D. Barton, Sandia National Labs, Albuquerque, NM; K. Bernhard-Hofer, Infineon, Regensburg, Germany
Techniques for failure localization and design modification through bulk silicon are essential for multi-level metallization and new flip chip packaging methods. This tutorial reviews the transmission of light through silicon and multiple sample preparation techniques.
