Defect Reduction in Semiconductor Equipment by Thermal Spray

Semiconductor equipment manufactures are focusing on vacuum process chambers which are building logic/memory integrated circuits on silicon wafers.  Defect reduction is always a priority for semiconductor manufactures to improve device yield, and for semiconductor equipment manufactures to meet one the chamber performance specifications, defect count, which is measured by number of particle adders per area on a wafer.  Inside a deposition chamber, small portion of materials is deposited on the wafer, but majority on the process kits.  When the deposit exceeds a critical thickness, it forms particle source, and lands on to the wafer. 

Bead blasting and thermal spray coatings on chamber process kits are often used to improve adhesive strength between the kit and the deposits.  For depositing ductile materials such as copper interconnector, bead blasting on the kits is sufficient.  For depositing refractory materials, such as W liner, the twin wire arc spray technology is used to enhance kit performance.  It is important to optimize the spray parameters and obtain a combination of high coating density and rough surface.  To achieve the high density is for improving cohesive strength within the coating, which can survive at high stress concentration points during chamber thermal/pressure cycling.  The rough surface is designed for improving adhesive strength between the sprayed coatings and the chamber deposits over a scheduled service time.