ISTFA Home      Exposition      To Register      ASM Homepage
Back to "Session 5: Package Level Analysis 1" Search
  Back to "Symposium" Search  Back to Main Search

Tuesday, November 16, 2004 - 1:55 PM
5.2

Failure Analysis of Short Faults on Advanced Wire-bond and Flip-chip Packages with Scanning SQUID Microscopy

S. K. Hsiung, K. V. Tan, LSI Logic Corporation, Fremont, CA; A. J. Komrowski, LSI Logic Corp., Fremont, CA; D. J. D. Sullivan, LSI Logic, Fremont, CA; J. Gaudestad, Neocera Inc, Beltsville, MD

View in WORD format