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Thursday, November 18, 2004 - 8:00 AM
19.1

PLENARY TALK: An effective Failure Analysis Strategy for the successful introduction of new products designed in 90 and 65 nm CMOS technologies

F. Lorut, M. Lamy, STMicroelectronics, Crolles, France; S. Fabre, M. De la Bardonnie, L. Kwakman, Philips Semiconductors, Crolles, France; R. Ross, K. Ly, Freescale Semiconductor, Crolles, France; C. Wyon, CEA-LETI, Grenoble, France

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