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Monday, November 15, 2004 - 3:45 PM

Silicon Debug

J. Stinson, B. Gottlieb, Intel Corporation, Santa Clara, CA; D. Josephson, Hewlett Packard, Ft. Collins, CO; B. Huott, IBM, Unknown, NY

Intended Audience: (approximately 30 words)

The audience is intended to be primarily design/test engineers working in silicon debug/diagnosis, as well as managers and other technologists interested in the techniques and methods used for silicon debug.

Tutorial Summary: (approximately 100 words)

This tutorial is an short overview of the complex process of silicon debug. An overview and the basic approaches of silicon debug are covered. Design for debug, and a review of hardware hooks to facilitate debug are then presented, followed by the methods and processes used to perform silicon debug using such features as well as external debug tools. A review of CMOS circuit types is presented and the failure modes of circuits are discussed. With this foundation, the processes of logical and electrical debug are described in detail, and a case study from actual silicon debug is presented. In conclusion, future challenges for debug are described.