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| Device and Test 3 | ||||
| Location: Jr. Ballroom (Worcester's Centrum Centre) | ||||
| (Please check final room assignments on-site). | ||||
| Session Description: | ||||
| Editors: | Mr. David Vallett IBM Systems and Technology Group, Essex Jct., VT Dr. William Vanderlinde Laboratory for Physical Sciences, College Park, MD | |||
| Session Chairs: | Ms. Becky Holdford Texas Instruments, Dallas, TX Rose Ring SMSC Austin, Austin, TX | |||
| 12:15 PM | Lunch | |||
| 1:15 PM | High Speed Analog Circuits Failure Analysis | |||
| 1:50 PM | Structure and Commands for Failure Analysis | |||
| 2:30 PM | Logic Diagnosis: Techniques, Applications and Challenges | |||
| 3:30 PM | Break | |||
| 3:45 PM | Silicon Debug | |||
| 5:45 PM | Drawing and Final Remarks | |||