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Sunday, November 14, 2004 - 8:15 AM

Failure Analysis Challenges for Chip Scale Packages

C. Yuan, AMD, Sunnyvale,, CA; S. Li, Spansion Inc, Sunnyvale, CA

This seminar presents an overview of failure analysis techniques related to chip scale packages. Both mechanical and chemical methods to successfully decapsulate the CSP packages will be presented. Multi-Chip Package (MCP), with several die stacked into one CSP, will also be discussed for its unique package structures and associated special challenges.