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Sunday, November 14, 2004 - 10:45 AM

Stacked Die Repackaging And Failure Analysis

R. D. Harrison, Texas Instruments, Dallas, TX

Backside Analysis Using Re-Package Techniques Ray Harrison: Texas Instruments Inc

Abstract

Backside analysis, in many varied manners, has been under development as a useful tool for quite some time. The vary nature of this method of analysis, used for debug and fault isolation, requires a stretch of the imagination and creative solutions for which we see no limits. The procedures used to gain access to the back of the target die for Backside Photo Emission Microscopy have created many unique and challenging solutions of their own. In this discussion, “Repackaging” the device into a configuration allowing access to the target die, while maintaining identical electrical dynamics and characteristics, will be considered. The use and successful implementation of the described method has given us a new tool for solving some very complex and troublesome engineering problems.

Introduction

As a result of technological advancements, utilization of backside analysis techniques have become more and more necessary as a tool for debug and fault isolation. Backside analysis has been employed in semiconductor industry and is used for failure analysis in conjunction with infrared radiation(IR) detection equipment as a means to detect photon emissions. Increased utilization of metal plugs used for planarization, and increased number of metal levels prevents these same photons from being detected using normal top-side detection methods. Backside analysis techniques efficiently collect emitted photons that were previously blocked or refracted by multi layer metallization. In addition, for packages where the backside of the die cannot be exposed, such as ìBGA or stack die packages, the target die can be re-packaged, using a technique that was developed to successfully isolate defect locations. Using this technique the target die is repackaged such that the backside is accessible, and all the original electrical parameters can still be exercised using test program patterns.