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| Session 8: Circuit Edit for FA, FI and Debug 1 | ||||
| Location: Jr. Ballroom (Worcester's Centrum Centre) | ||||
| (Please check final room assignments on-site). | ||||
| Session Description: The sessions consist of excellent papers addressing many ongoing issues in the FIB world. Both front side and back side FIB edits are discussed, along with issues that are common to both, such as FIB imaging, addressed in the plenary paper of the first session. | ||||
| Editors: | James Cargo Agere Systems, Allentown, PA Mr. Stanley Swieck Analog Devices, Wilmington, MA Mr. Michael Eskenazi Qualcomm Corporation, San Diego, CA Felix Beaudoin IBM Mr. Ted Hasegawa National Semiconductor, Santa Clara, CA Mr. David Vallett IBM Systems and Technology Group, Essex Jct., VT Mr. Kultaransingh Hooghan Agere Systems, Murphy, TX | |||
| Session Chair: | Mr. Kultaransingh Hooghan Agere Systems, Murphy, TX | |||
| 3:55 PM | 8.1 | PLENARY TALK: A Novel Approach for Enhancing Critical FIB Imaging for Failure Analysis Applications | ||
| 4:20 PM | 8.2 | Contacting Silicon with FIB for Backside Circuit Edit | ||
| 4:45 PM | 8.3 | IC specification improvement through direct passive component modification in the FIB | ||
| 5:10 PM | 8.4 | FIB Chip Repair: Improving Success by Controlling Beam-Induced Damage and Thermal / Mechanical Stress | ||
| 5:35 PM | Adjourn | |||