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Device and Test 1 | ||||
Location: Jr. Ballroom (Worcester's Centrum Centre) | ||||
(Please check final room assignments on-site). | ||||
Session Description: | ||||
Editors: | Dr. William Vanderlinde Laboratory for Physical Sciences, College Park, MD Mr. David Vallett IBM Systems and Technology Group, Essex Jct., VT Ms. Jennifer Arnold ASM International, Materials Park, OH | |||
Session Chairs: | Mr. Brad Waterson Analog Devices, Cambridge, MA Dr. William Vanderlinde Laboratory for Physical Sciences, College Park, MD | |||
8:00 AM | Welcoming Remarks | |||
8:15 AM | CMOS Defect Electronics | |||
9:15 AM | CMOS Short Channel Impact on Detection | |||
10:30 AM | Break | |||
10:45 AM | ESD Testing of Electronic Components Using the Transmission Line Pulse (TLP) Methodology |