Chip Scale Package (CSP) is ideal for the applications of Cellular and Portable devices, and is widely used for memory device packaging. It has advantages of low package profile, easy routing and superior reliability. In the meantime, it also creates more challenges for handling this type of packages for device debugging and failure analysis. This seminar presents an overview of chip scale packages from the aspects of failure analysis techniques associated with this special type of packages. Both mechanical and chemical ways to successfully decapsulate the CSP packages will be discussed. Multi-Chip Package (MCP), a more advanced CSP packages with stacking dice will also be discussed. Several case studies are also included to demonstrate the procedures for performing failure analysis on this type of devices.

Learning Objectives: -Gain knowledge on Chip Scale Packages, including Multi-chip -Packages for their application, reliability advantage, and special packaging structures. -Understand the challenges that CSP brings during device debugging and failure analysis -Learn the decapsulation techniques required for this special type of packages, especially for MCP packages with stacking dices