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Monday, November 7, 2005 - 9:00 AM
GEN0513.2

Flip-Chip and Backside Analysis Techniques

E. I. Cole, Sandia National laboratories, Albuquerque, NM; D. L. Barton, Sandia National Laboratories, Albuquerque, NM; K. Bernhard-Höfer, Infineon, Munich, Germany

State-of-the-art techniques for failure localization and design modification through bulk silicon are essential for multi-level metallization and new flip chip packaging methods. This tutorial reviews the transmission of light through silicon, sample preparation and backside defect localization techniques that are both currently available and under development. The techniques covered include emission microscopy, scanning laser microscope based techniques (electrooptic techniques, LIVA and its derivatives) and other non-IR based tools (FIB, e-beam techniques, etc.).