C. De Nardi, CNES-French Space Agency, Toulouse, France; R. Desplats, P. Perdu, CNES - French Space Agency, Toulouse, France; C. Guérin, DGA/CELAR French Defense Department, Bruz, France; J. L. Gauffier, T. B. Amundsen, Institut National des Sciences Aplliquées (INSA), Toulouse, France

Summary: Failure Analysis have to deal with challenging questions about stored charges in floating gates in Non Volatile Memories (NVM) when reading does not give expected data. Access to this information will help to understand failure mechanisms. A method to measure on-site programmed charges in Flash EEPROM devices is presented. Scanning Capacitance Microscopy (SCM) is used to directly probe the carrier concentration on Floating Gate Transistor (FGT) channels. The methodology permits to map channels and active regions from the die backside. Transistor charged values (ON/OFF) are measured and localized with a 15 nm resolution. Both preparation and probing methods are discussed. Applications are demonstrated on two different Flash technologies: the two-transistor cell (2T-cell) from Atmel and the one-transistor cell (1T-cell) from STMicroelectronics.