R. Fredrickson, On Semiconductor, Gresham, OR

Summary: In this paper, a fault identification method is discussed by creating a Simulated Passive Voltage Contrast Reference that can be displayed next to the SEM VC image for a comparison of the expected VC. By comparing the reference image representation to what is seen in the SEM, defective connections can be easily identified. This reference “display” is produced by processing the design’s polygon file (such as a GDS2) through an algorithm that simulates the connections at a given layer to the layers below and outputs a new polygon file (GDS2) with sub-layer markers indicating a ground, gate, or open connection.