R. Schlangen, U. Kerst, C. Boit, TUB Berlin Institute of Technology, Berlin, Germany

Summary: A full physical debug concept for Integrated Circuits (ICs) based upon backside Focused ion Beam (FIB) preparation has been developed. After creation of a back surface on ultra thin silicon (UTS) with FIB, physical functional analysis can be performed with nanoscale potential because of the short remaining interaction path, Circuit Edit (CE) can be performed in a much lager variety from one active device to others, and functional parts can be edited that even have not been contacted originally. Finally we report on increasing or decreasing transistor speed depending on depth of FIB processing, offering the unique opportuniy to accelerate slow signal paths that would make the following part of the circuit untestable or to compensate for resistance increases due to CE. All techniques are applied to a fully functional circuit which underlines the unique character of the presented approach.