Chip Scale Package and Its Failure Analysis Challenges

Susan X. Li

Spansion

Sunnyvale, California 94088

Overview:

Chip Scale Package (CSP) is ideal for the applications of Cellular and Portable devices, and is widely used for memory device packaging. It has advantages of low package profile, easy routing and superior reliability. In the meantime, it also creates more challenges to handle this type of packages for failure analysis and device debugging. This seminar presents an overview of chip scale packages from the aspects of failure analysis techniques associated with this special type of packages. Both mechanical and chemical ways to successfully decapsulate the CSP packages will be discussed. Multi-Chip Package (MCP), a more advanced CSP packages with stacking dice will also be discussion for its unique package structures and associated special challenges.

Learning Objectives:

-Gain knowledge on Chip Scale Packages, including Multi-chip Packages for their application,reliability advantage, and special package structures

-Understand the challenges that CSP creates for device handling during failure analysis and device debugging

-Learn the special decapsulation techniques that are required for this special type of packages, especially for MCP packages with stacking dices

-Use the case studies demonstrated in this seminar to apply the learned knowledge to daily failure analysis work