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The 35th International Symposium for Testing and Failure Analysis (November 15-19, 2009) of ASM |
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Die and Defect Access | ||||
Location: Meeting Room J3 (San Jose McEnery Convention Center) | ||||
(Please check final room assignments on-site). | ||||
Session Description: Manufacturing a chip requires weeks, and a failure analyst can take the chip apart in minutes. But given constraints of functionality or imaging, deconstruction requires more thought and effort. The Die and Defect Access Track shows us techniques for opening complex packages and delayering the die. | ||||
Session Chair: | Dr. Chad Rue FEI Company, Hillsboro, OR | |||
10:30 AM | Enhanced De-Packaging and Chip Access | |||
11:45 AM | Lunch | |||
12:45 PM | Chip Scale Package and its FA Challenges | |||
1:45 PM | Flip Chip and Backside Analysis Techniques | |||
3:00 PM | Break | |||
3:15 PM | Delayering Techniques |