S. B. Herschbein, C. H. H. Kang, H. E. Berman, C. F. Scrudato, A. D. Shore, IBM Systems & Technology, Hopewell Junction, NY; B. Dai, Stanford University, Stanford, CA

Summary: The installation of a full wafer Dual Beam FIB on the wafer fabrication line has created the opportunity to move certain traditional failure analysis tasks out of the lab and onto the factory floor. Over the past few years numerous papers have been published on the value of the in-line FIB as an early learning tool for construction analysis and defect root-cause determination. Most of this in-line work, however, is initiated by defects found at level thru digital image subtraction (SEM or optical inspection). The uniqueness of this work is that we have developed embedded SRAM arrays that are fully testable at M4. Analysis of the electrical defect signature combined with a precise targeting methodology by FIB produces an accurate correlation between test data and physical findings. Engineering lots that have completed M4 testing can be routed to the FIB for top down and cross-sectional failure analysis, then returned to the line to complete the wafer build. This data can be used immediately to supplement grand pareto analysis for health of the line determination. It is effective in finding simple visual as well as what otherwise might have been considered non-visual defects, reduces wafer scrappage, and provides feedback faster than traditional methods that rely on electrical test and FA on finished wafers.