S. H. Lim, H. E. Lwin, N. Vinod, J. Chin, Advanced Micro Devices Pte Ltd, SIngapore, Singapore

Summary: Front-side Scanning Capacitance Microscopy for SOI devices is used for Failure Analysis to isolate failing transistors. Further dC/dV characterization on the contacts of the individual transistors can help to reveal the failure signature of the transistor. This technique can help to narrow down to a single failing transistor over a large area and provide failing signature.