Sample Preparation User Group
Successful failure analysis of semiconductor devices highly depends on high quality samples. For this reason, sample preparation plays a critical role in failure analysis. It has become imperative for failure analysts to remain abreast of new tools and techniques to address sample preparations on More-than-Moore (MTM) technologies.
Come and participate in a lively group discussion on state-of-the-art sample preparation for failure analysis. This is an interactive discussion where questions you may want answered only need to be asked. Considering the vast fields of expertise of our attendees in one room, someone is bound to have an answer to share with the group.
The session will be highlighting a range of sample preparation techniques and strategies including mechanical, chemical, thermal management, ion milling, and specific lift-out techniques initiated by our invited panelists. Topics will include sample preparation from the bulk device to die and board level with interferometers and surface curve matching to support ultra-thin Silicon sample prep. Mr. Jim Colvin, Consultant, Dr. Nathan Bakken, PhD, Intel Corporation, Dr. Cecile S. Bonifacio, E.A. Fischione Instruments, Inc. and Mr. Kah Chin Cheong, Onsemi