Large Area Circuit Delayering from the Backside Using Chemically assisted Focused Ion Beam Sputtering with Optical Metrology Feedback

Summary:

A novel method to large scale full chip delayering of advanced node semiconductors is to approach the task from the substrate side of the device. In addition to enabling the visualization of the transistor structure very early in the deprocessing work flow, this also enables examination of the n-well dopant layers with SEM voltage contrast before the process starts. The circuit interconnect and via layers can be sequentially removed using chemically assisted focused ion beam (FIB) sputtering in combination with characteristic ultraviolet photon collection for process endpoint monitoring. This technique was a well established FIB technique and also investigated for circuit editing applications. In this process a focused argon ion beam is scanned across the sample surface in combination with water dosing to address challenges associated with sputtering heterogeneous surfaces like copper and silicon oxide.