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| Session 26: Circuit Edit for FA, FI and Debug 2 | ||||
| Location: South Ballroom (Worcester's Centrum Centre) | ||||
| (Please check final room assignments on-site). | ||||
| Session Description: The sessions consist of excellent papers addressing many ongoing issues in the FIB world. Basic FIB issues are also discussed along with improvements in depositions, etching, damage, damage control and recovery. The grand finale is an issue that is confronting contemporary Fibbers: i.e. performing front and back side edits on the same chip. | ||||
| Editors: | Mr. Kultaransingh Hooghan Agere Systems, Allentown, PA James Cargo Agere Systems, Allentown, PA Mr. Stanley Swieck Analog Devices, Wilmington, MA Mr. Michael Eskenazi Qualcomm Corporation, San Diego, CA Felix Beaudoin IBM Mr. Ted Hasegawa National Semiconductor, Santa Clara, CA Mr. David Vallett IBM Systems and Technology Group, Essex Jct., VT | |||
| Session Chair: | Mr. Kultaransingh Hooghan Agere Systems, Allentown, PA | |||
| 3:05 PM | 26.1 | Optimizing FIB Depositions and Gas-Assited Etching | ||
| 3:30 PM | 26.2 | Fluorocarbon Precursor for High Aspect Ratio Via Milling in Focused Ion Beam Modification of Integrated Circuits | ||
| 3:55 PM | 26.3 | A Simple FIB Method for Constructing Electrically Isolated Microprobe Pads for the Electrical Analysis of Failing 0.12um Technology SRAM Bit Cells | ||
| 4:20 PM | 26.4 | "On Wafer" Design Validation through Complementary Dual-Side Circuit Editing using FIB | ||
| 4:45 PM | Concluding Remarks | |||