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| Session 8: Sample Prep for Chip Access and Device Deprocessing 2 | ||||
| Location: Lalique Ballroom (InterContinental Hotel Dallas) | ||||
| (Please check final room assignments on-site). | ||||
| Session Description: | ||||
| Session Chairs: | Ms. Becky Holdford Texas Instruments, Dallas, TX Mr. Robert Champaign Raytheon Network Centric Systems, McKinney, TX | |||
| 8:00 AM | 8.2 | A Novel Junction Profiling Methodology | ||
| 8:25 AM | 8.3 | Improvement of Optical Resolution through Chip Backside Using FIB Trenches | ||
| 8:50 AM | 8.4 | Copper to Aluminum Bonding: Interface Clarity and IMC Characterization through New Mechanical Sectioning Methodology | ||
| 9:15 AM | 8.5 | Sample Preparation and Analysis On Full-Thickness Silicon Wafers for Wafer-to-Wafer Bonding Process Development | ||
| 9:40 AM | 8.1 | Characterization and Failure Analysis of 3D Integrated Semiconductor Devices- Novel Tools for Fault Isolation, Target Preparation and High Resolution Material Analysis | ||