4.3
Silicon & Package Preparation Options for Focused Ion Beam (FIB) Circuit Editing & General Packaging Failure Analysis

Monday, November 4, 2013: 3:50 PM
Meeting Room 230A (San Jose McEnery Convention Center)
Mr. Steven B. Herschbein , IBM Systems & Technology, Hopewell Junction, NY
Mr. George K. Worth , IBM Systems & Technology, Hopewell Junction, NY
Mr. Edward S. Hermann , IBM Systems & Technology, Hopewell Junction, NY
Mr. Carmelo F. Scrudato , IBM Systems & Technology, Hopewell Junction, NY

Summary:

An unusual synergy: Changes in chip & packaging are driving continuous development in backside FIB Chip Edit. We have been able to apply much of our silicon and package machining skills to greatly aid the 3D Package development effort.
See more of: Session 4: Circuit Edit
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