Zynq SOC low-voltage and temperature dependent L2 cache failure diagnosis and defect localization Case Study
Zynq SOC low-voltage and temperature dependent L2 cache failure diagnosis and defect localization Case Study
Wednesday, November 8, 2017
Summary:
Zynq System-on-Chip (SoC) integrates both Processor and Programmable Logic architectures, where the whole functionality of a system is placed on a single chip. Due to the advancement of process technology, the complexity of circuit analysis becomes harder and the failures modes are becoming marginal, e.g., leakage in nano-ampere range. SoC devices require very challenging work for failure localization and failure mechanism analysis. This paper demonstrates the successful electrical and physical failure analysis of Xilinx Zynq SoC cache failures. The signature of the failure is sensitive to extreme low-voltage and high temperature, where diagnostics need advanced electrical and physical failure isolation methodology. The case study is in nano-ampere leakage isolated to a specific metal gate feature. Different types of silicon defects were confirmed with subsequent planar and cross-sectional TEM analysis which caused such failures at extreme condition.
Zynq System-on-Chip (SoC) integrates both Processor and Programmable Logic architectures, where the whole functionality of a system is placed on a single chip. Due to the advancement of process technology, the complexity of circuit analysis becomes harder and the failures modes are becoming marginal, e.g., leakage in nano-ampere range. SoC devices require very challenging work for failure localization and failure mechanism analysis. This paper demonstrates the successful electrical and physical failure analysis of Xilinx Zynq SoC cache failures. The signature of the failure is sensitive to extreme low-voltage and high temperature, where diagnostics need advanced electrical and physical failure isolation methodology. The case study is in nano-ampere leakage isolated to a specific metal gate feature. Different types of silicon defects were confirmed with subsequent planar and cross-sectional TEM analysis which caused such failures at extreme condition.