Case Study of a DDR Loopback Test Failure Encountered on a Map Ball Grid Array Packaged Device

Thursday, November 9, 2017: 3:10 PM
Ballroom A (Pasadena Convention Center)
Mr. Jose. Z Garcia , NXP Semiconductors, AUSTIN, TX
Mr. Kristofor Dickson , NXP Semiconductors, Austin, TX


This paper describes how a microcontroller customer return was repackaged into a flip chip friendly TBGA. We discussed how the high speed DDR memory interface was tested using a test methodology that eliminated the need for expensive hardware. A DDR loopback failure was analyzed using many difference failure analysis techniques. By analyzing the data set provided through the usage of different toolsets, it was possible to isolate the root cause of the DDR failure to a resistive contact to metal-1 interface. Ultra-high resolution transmission electron microscope images identified an oxygen-rich layer between two conductive layers.