Low Power Devices Case Studies / FA Processes Case Studies II
Thursday, November 9, 2017: 2:20 PM-4:00 PM
Ballroom A (Pasadena Convention Center)
Mr. Gil Garteiz, Freescale Semiconductor and Dr. Szu Huat Goh, GLOBALFOUNDRIES
2:20 PM
Schematic Transformation to Enhance Circuit Failure Design Debug
Mr. Varun Gupta, GLOBALFOUNDRIES Singapore Pte Ltd;
Mrs. Wendy Wee Yee Lau, GLOBALFOUNDRIES Singapore Pte Ltd;
Dr. SH Goh, GLOBALFOUNDRIES Singapore Pte Ltd;
Dr. Heng Wah Ho, GLOBALFOUNDRIES Singapore Pte Ltd;
Mr. Hao Hu, GLOBALFOUNDRIES Singapore Pte Ltd;
Dr. M.K. Dawood, GLOBALFOUNDRIES Singapore Pte Ltd;
Dr. Jeffrey C. Lam, GLOBALFOUNDRIES Singapore Pte Ltd
3:35 PM
Failure Analysis and Process Verification of High Density Copper ICs used in Multi-Chip Modules (MCM)
Mr. Jeremy A. Walraven, Sandia National Laboratories;
Mr. Mark Jenkins, Sandia National Laboratories;
Dr. Edward I. Cole Jr., Sandia National Laboratories;
Mrs. Tuyet N. Simmons, Sandia National Laboratories;
Mr. James L. Levy, Sandia National Laboratories, Mixed Signal ASIC/SoC Products;
Dr. Sarah E. Jensen, Sandia National Laboratories, MESA Fabrication Operations;
Dr. Adam Jones, Sandia National Laboratories, MESA Fabrication Operations;
Mr. Eric E. Edwards, Sandia National Laboratories, Mixed Signal ASIC/SoC Products;
Dr. James A. Bartz, Sandia national Laboratories, R&D Electrical Engineering;
Mr. Lovelace Soirez, Novati Technologies;
Mr. John Norbert, Novati Technologies