Hardware attacks, security, and reverse engineering

Tuesday, November 7, 2017: 1:20 PM-3:00 PM
Ballroom C (Pasadena Convention Center)
Dr. Sahar Hihath, DMEA and Dr. Navid Asadi, University of Florida
1:20 PM
INVITED: Combining Hardware Security, Failure Analysis and Forensic Analysis for the benefit of all
Dr. Sergei Skorobogatov, University of Cambridge
1:45 PM
Fast and Robust Topology-Based Logic Gate Identification for Automated IC Reverse Engineering
Mr. Roger Durà, IMB-CNM(CSIC); Mr. Jofre Pallarès, IMB-CNM(CSIC); Mr. Raúl Quijada, IMB-CNM(CSIC); Mr. Xavier Formatjé, IMB-CNM(CSIC); Dr. Salvador Hidalgo, IMB-CNM(CSIC); Dr. Francisco Serra-Graells, IMB-CNM(CSIC)
2:10 PM
STUDENT PAPER: Backside Protection Structure for Security Sensitive ICs
Ms. Elham Amini, Technical University of Berlin; Dr. Ruslan Muydinov, Technical University of Berlin; Prof. Bernd Szyszka, Technical University of Berlin; Prof. Christian Boit, Technical University of Berlin
2:35 PM
Steps Toward Automated Deprocessing of Integrated Circuits
Dr. E.L. Principe, Synchrotron Research Inc.; Prof. Navid Asadizanjani, PhD, University of Florida; Prof. Domenic Forte, University of Florida; Prof. Mark Tehranipoor, PhD, University of Florida; Dr. Robert D. Chivas, Varioscale; Dr. Michael DiBattista, Qualcomm Technologies, Inc; Mr. Scott Silverman, Varioscale, Inc; Dr. Mike Marsh, Object Research Systems; Nicolas Piche, Object Research Systems; Mr. John Mastovich, Bruker AXS, Inc.
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