Case Study of Electro-Optical Probing Signal with High Signal-Noise Ratio

Wednesday, November 13, 2019
Exhibit Hall D (Oregon Convention Center)
Mr. Ryan Xiao , NXP Semiconductors-(China) Limited, Tianjin, China
Mr. William Wang , NXP Semiconductors-(China) Limited, Tianjin, China
Mr. Ang Li , NXP Semiconductors-(China) Limited, Tianjin, China
Mr. Shengqiu Xu , NXP Semiconductors-(China) Limited, Tianjin, China
Mr. Binghai Liu , NXP Semiconductors-(China) Limited, Tianjin, China
Dr. Keith Serrels , NXP Semiconductors, Austin, TX

Summary:

In this paper, two real cases with high SNR signal captured by EOP are introduced. Based on our finding, four related simulation experiments are carried out the results meet the expectation. The high SNR signal can be observed at the transistor which drain and source are connected to power and ground separately, or at both Nmos and Pmos of the transistor which gate is floating. After summarization, we conclude that the high SNR signal can be found at the transistor which exist high Ids current from power to ground, in other words, the electrical potential difference from drain to source Vds is equal to Vdd all the time. Besides, another three points, the abnormal PEM spot, overlaid weak clock signal and slow edge signal, are also discussed and explained separately. According to the finding in this paper, it will be helpful for FA to isolate the failure more precisely and understand the failure mechanism more clearly.