Failure Analysis Approaches for Stacking Fault Defects in FinFET Devices

Wednesday, November 13, 2019
Exhibit Hall D (Oregon Convention Center)
Mr. Beomjun Kim , Samsung Electronics, Yongin, Korea, Republic of (South)

Summary:

In this paper, the stacking fault defects in FinFETs are described as the root cause of the PLL failure. Failure analysis approaches such as photon emission microscopy and nano probing are applied to pinpoint the exact failure position. RX local density was confirmed as the key factor in stacking fault generation. So RX new mask with dummy addition was made to mitigate stress and it is confirmed to be effective to reduce the compressive strain at the channel in FinFETs by Geometric Phase Analysis.