Electrical characterization of circuit edit workflow using high and low energy FIB
Electrical characterization of circuit edit workflow using high and low energy FIB
Thursday, November 3, 2022: 11:00 AM
Ballroom A (Pasadena Convention Center)
Summary:
The workflow of backside IC circuit edits using low and high ion-beam energy is investigated. The imaging capabilities using a high keV beam is superior to that of lower beam energy, even when using low beam currents, on typical ion beam microscopes. In this work, we will test the parametric shift of IC components following the use of 5 keV Gallium Focused Ion Beam (FIB) to expose Shallow Trench Isolation (STI), depositing a protective dielectric layer, and then switching to 30 keV FIB to perform device alteration. Electrical testing results show that the devices exhibit only a minor parametric shift. We present a case study, performing circuit edit on a 7 nm process node using the proposed workflow. Finally, we discuss the advantages of the proposed workflow
The workflow of backside IC circuit edits using low and high ion-beam energy is investigated. The imaging capabilities using a high keV beam is superior to that of lower beam energy, even when using low beam currents, on typical ion beam microscopes. In this work, we will test the parametric shift of IC components following the use of 5 keV Gallium Focused Ion Beam (FIB) to expose Shallow Trench Isolation (STI), depositing a protective dielectric layer, and then switching to 30 keV FIB to perform device alteration. Electrical testing results show that the devices exhibit only a minor parametric shift. We present a case study, performing circuit edit on a 7 nm process node using the proposed workflow. Finally, we discuss the advantages of the proposed workflow