DIE LEVEL FAULT ISOLATION: Logic State PEM Analysis for ATPG SCAN Logic Failure

Wednesday, November 2, 2022
Exhibit Halls A & B (Pasadena Convention Center)
Mr. Soon Woei Chong , Qualcomm Global Trading Pte Ltd., Singapore, Singapore
Mr. Kan Sun , QUALCOMM, Singapore, Singapore
Wilson Cheng Hoe Lee , Qualcomm Global Trading Pte Ltd., Singapore, Singapore
Mr. Hao Hu , QUALCOMM, Singapore, Singapore
Ms. Lesly Endrinal , QTI Qualcomm, San Diego, CA
Mr. Rahul Babu Radhamony , QUALCOMM, Singapore, Singapore

Summary:

Logic State PEM methodology provide an alternate optical electrical fault isolation (EFI) solution to handle any ATPG SCAN logic failure part without conclusive EMMI finding, improve EFI confident level up to 100% & reduce physical fault analysis (PFA) area of interest (AOI) size especially on any critical Automotive returns & any Digital rejects across difference tech node.