CMOS Integrated Circuit Analysis using Superconducting Nanowire Single-Photon Detectors

Summary:

Photoemission microscopy (PEM) of integrated circuits (ICs) is a technique which has been used for integrated circuit (IC) failure analysis (FA) for several decades. Photoemission in ICs is caused by a combination of physical phenomena and can be measured in ICs that may or may not have faults. Here we discuss time-resolved emission microscopy (TREM), which has been used for picosecond imaging circuit analysis (PICA) of ICs. Such photoemission is produced by hot carrier luminescence in silicon. In CMOS (complementary metal-oxide semiconductor) logic, this current flows when a FET changes its logical state, i.e., from ‘on’ to ‘off’ and vice-versa. Transistors in modern very-large-scale use lower rail voltages and have small switching currents. This reduces the number of photons emitted and lowers their wavelengths into the infrared (IR). We address these challenges by using superconducting nanowire single photon detectors (SNSPDs) for microscopy-based failure analysis of integrated circuits.