More Than Moore - Reliability Testing and Failure Analysis of Silicon Photonics with 60GHz for 200G/lane under Thermal and Humidity Stress

Wednesday, November 19, 2025
Dr. Huang-Yu Lin , Hon Hai Research Institute, Foxconn, Taipei, Taiwan, Taiwan
Dr. Chin Wei Sher , Hon Hai Research Institute, Foxconn, Taipei, Taiwan
Dr. Wen-Cheng Hsu , Hon Hai Research Institute, Foxconn, Taipei, Taiwan, Taiwan
Prof. Hao Chung Kuo , Hon Hai Research Institute, Foxconn, Taipei, Taiwan, Taiwan
Dr. Yong-Fen Hsieh , Materials Analysis Technology Inc., Hsinchu, Taiwan, Taiwan
Ms. Pei-Ju Chiu , Materials Analysis Technology Inc., Hsinchu, Taiwan, Taiwan
Yu Feng Ko , Materials Analysis Technology Inc., Hsinchu, Taiwan, Taiwan

Summary:

As data centers rapidly evolve, the demand for high-speed, energy-efficient optical communication solutions has propelled the rise of silicon photonics. This study investigates the reliability of silicon photonic integrated circuits (PICs) designed for 200G/lane data rates under severe thermal and humidity stress conditions. Through systematic thermal cycling (TCT) and highly accelerated stress testing (uHAST), the bare dies exhibited excellent stability, with minimal electrical variation and projected lifespans exceeding 15 years under typical conditions. Even under harsher uHAST environments (55°C, 60% RH), the devices maintained robust performance, demonstrating an estimated operational lifetime of 6 years. However, when integrated into complex 3D packages with multiplexers, laser drivers, and EML lasers, increased thermal stress on interconnect bumps presents a key reliability challenge. This research offers crucial insights into the qualification of silicon photonics for next-generation high-speed interconnects.
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