Localizing Fringe Capacitor Shorts in Advanced Nodes Using a VC Guided FIB Rule Out Methodology and PFIB Delayering
Localizing Fringe Capacitor Shorts in Advanced Nodes Using a VC Guided FIB Rule Out Methodology and PFIB Delayering
Wednesday, October 7, 2026: 11:00 AM
Summary:
Fringe capacitors (FCs) in advanced semiconductor devices are embedded in dense BEOL metal stacks, where shrinking metal dimensions and large area FC structures make physical failure analysis (PFA) becomes increasingly difficult. Sub micron leakage paths or metal bridging defects are often deeply buried in ultra low k (ULK) ILD regions and cannot be reliably detected by optical microscopy or conventional SEM imaging. Although backside electrical failure analysis (EFA) techniques such as OBIRCH can localize hotspots, transitioning from electrical isolation to physical defect identification remains challenging due to ULK electron beam sensitivity and the risk of defect loss during traditional PFIB layer by layer delayering. This work presents a structured, voltaic contrast (VC) preserving FC rule out methodology designed to isolate the true short path without prematurely removing the defect. The workflow integrates circuit review, FIB cross section, VC analysis at cross section view, PFIB delayering, and final TEM confirmation. Two large scale FC failure cases from a 40 nm technology node demonstrate that the traditional approach failed to expose the defect, while the proposed rule out method successfully identified a subtle M1 bridging short. The results confirm improved accuracy, efficiency, and reliability for FC PFA in advanced BEOL structures.
Fringe capacitors (FCs) in advanced semiconductor devices are embedded in dense BEOL metal stacks, where shrinking metal dimensions and large area FC structures make physical failure analysis (PFA) becomes increasingly difficult. Sub micron leakage paths or metal bridging defects are often deeply buried in ultra low k (ULK) ILD regions and cannot be reliably detected by optical microscopy or conventional SEM imaging. Although backside electrical failure analysis (EFA) techniques such as OBIRCH can localize hotspots, transitioning from electrical isolation to physical defect identification remains challenging due to ULK electron beam sensitivity and the risk of defect loss during traditional PFIB layer by layer delayering. This work presents a structured, voltaic contrast (VC) preserving FC rule out methodology designed to isolate the true short path without prematurely removing the defect. The workflow integrates circuit review, FIB cross section, VC analysis at cross section view, PFIB delayering, and final TEM confirmation. Two large scale FC failure cases from a 40 nm technology node demonstrate that the traditional approach failed to expose the defect, while the proposed rule out method successfully identified a subtle M1 bridging short. The results confirm improved accuracy, efficiency, and reliability for FC PFA in advanced BEOL structures.