Determining Optimal FIB Access Points using DFT-guided Simulation Data
Determining Optimal FIB Access Points using DFT-guided Simulation Data
Tuesday, October 6, 2026: 11:10 AM
Summary:
The adoption of backside power delivery networks in advanced semiconductor technologies introduces new challenges for electrical fault isolation (EFT), as the most important traditional techniques like Laser-Voltage-Probing and Photon-Emission will no longer work due to the lack of optical access to the FET layer. E-Beam-Probing (eBP) is being redeveloped for contactless probing of chip internal signals, but since eBP requires direct line of sight to the nets/cells of interest, usefulness of eBP will heavily depend on the ability of creating FIB access holes to the nets/cells of interest. Most high-performance compute chips will have >10 frontside metal layers, where most local routing will be on the lower most level, significantly limiting unobstructed FIB access. FA & debug on BSP chips will require careful planning & searching for the best FIB access hole locations. In this work, we present a novel methodology that leverages design-for-test (DFT) data and simulation to identify optimal front-side FIB-access locations.
The adoption of backside power delivery networks in advanced semiconductor technologies introduces new challenges for electrical fault isolation (EFT), as the most important traditional techniques like Laser-Voltage-Probing and Photon-Emission will no longer work due to the lack of optical access to the FET layer. E-Beam-Probing (eBP) is being redeveloped for contactless probing of chip internal signals, but since eBP requires direct line of sight to the nets/cells of interest, usefulness of eBP will heavily depend on the ability of creating FIB access holes to the nets/cells of interest. Most high-performance compute chips will have >10 frontside metal layers, where most local routing will be on the lower most level, significantly limiting unobstructed FIB access. FA & debug on BSP chips will require careful planning & searching for the best FIB access hole locations. In this work, we present a novel methodology that leverages design-for-test (DFT) data and simulation to identify optimal front-side FIB-access locations.