Closing Test Coverage Gaps in High-Volume Semiconductor Manufacturing: A Debug Methodology Leveraging Failure Analysis
Closing Test Coverage Gaps in High-Volume Semiconductor Manufacturing: A Debug Methodology Leveraging Failure Analysis
Tuesday, October 6, 2026: 11:30 AM
Summary:
This work demonstrates that traditional ATPG and system-level testing, while effective at the macro level, can leave critical coverage gaps at the sub-block and cross-domain levels. Our comprehensive debug methodology, leveraging both optical and physical failure analysis, proved essential for uncovering these hidden vulnerabilities. The targeted development of new test patterns and the refinement of design-for-test strategies not only improved coverage but also led to significant reductions in defect rates and the risk of quality escapes. These findings highlight the importance of continuous, in-depth audit and optimization of test strategies in advanced semiconductor manufacturing. As device complexity increases, only a rigorous, multi-layered approach to debug and coverage closure can ensure robust product reliability. The methodologies outlined in this paper provide a blueprint for elevating quality standards and minimizing latent defects in future high-volume production environments.
This work demonstrates that traditional ATPG and system-level testing, while effective at the macro level, can leave critical coverage gaps at the sub-block and cross-domain levels. Our comprehensive debug methodology, leveraging both optical and physical failure analysis, proved essential for uncovering these hidden vulnerabilities. The targeted development of new test patterns and the refinement of design-for-test strategies not only improved coverage but also led to significant reductions in defect rates and the risk of quality escapes. These findings highlight the importance of continuous, in-depth audit and optimization of test strategies in advanced semiconductor manufacturing. As device complexity increases, only a rigorous, multi-layered approach to debug and coverage closure can ensure robust product reliability. The methodologies outlined in this paper provide a blueprint for elevating quality standards and minimizing latent defects in future high-volume production environments.